高速接口时序例外审查助手
审查高速接口相关时序例外，判断哪些是 IP 推荐、哪些是工程假设、哪些可能隐藏真实违例。适合PCIe、Ethernet、Aurora、DDR、ADC/DAC 等高速接口项目，重点解决“高速接口 IP 往往带一堆自动约束，用户再叠加手工约束后容易掩盖真实时序风险”这类真实 FPGA 项目问题。输出 时序例外审查表、可疑约束清单和可执行的后续动作。
skills/high-speed-interface-timing-audit/SKILL.md
- Required frontmatter and sections are present.
skills/high-speed-interface-timing-audit
- No private key, cloud key, token, or long generic secret matched.
skills/high-speed-interface-timing-audit
- No recursive deletion, cloud metadata access, encoded shell, or unreviewed transfer matched.
skills/high-speed-interface-timing-audit
- No runtime dependency manifest is included in this Skill package.
skills/high-speed-interface-timing-audit
- Package is documentation/reference only, so runtime sandbox is marked as dry-run ready.
skills/high-speed-interface-timing-audit/SKILL.md
- Score 96, level A+, pass rate 96.4%.
skills/high-speed-interface-timing-audit/SKILL.md
- Status is reviewed.
content/audit/evidence/high-speed-interface-timing-audit/bm-fmt.json
content/audit/evidence/high-speed-interface-timing-audit/bm-scenario.json
content/audit/evidence/high-speed-interface-timing-audit/bm-safety.json
content/audit/evidence/high-speed-interface-timing-audit/bm-regression.json
- 包哈希
- sha256:88597c94366357ba
- 文件数
- 7
- 可执行文件
- 0
- 复核结论
- publishable
- 复核团队
- IC Hub 审核团队
- 复核时间
- 2026-06-11
已知限制与下一步
审核结论只覆盖 Skill 包内容、安装计划和公开样例，不替代真实 FPGA 项目的上板测试、客户验收和安全审批。